LCB3568/J
SOC :RK3568
Storage :2+16 GB / 4+16 GB/ 8+32 GB
Size :60mm(L)*40mm(W)*7.8mm(H)
Product :The connection between the core module and the baseboard is facilitated by four dual-slot 80-pin board-to-board connectors with a 0.5mm pitch, secured by four M2 screws, ensuring stability and reliability, and making it easy to install and maintain.
| Basic Parameters | |
| SOC | RK3568/RK3568J is a 22nm process technology system-on-chip (SoC) featuring a quad-core 64-bit Cortex-A55 processor with a maximum clock speed of up to 2.0GHz. |
| GPU | ARM G52 2EE, OpenGL ES 1.1/2.0/3.2, OpenCL 2.0, Vulkan 1.1, high quality 2D Graphics Engine build in |
| NPU | up to 1 TOPS; INT8/INT16/FP16/BFP16 MAC hybrid operation supported；TensorFlow, TF-lite, Pytorch, Caffe, ONNX, MXNet, Keras, Darknet deep-learning frameworks supported |
| VPU | 4K VP9 and 4K H265 up to 60fps video decoding |
| 1080P up to 100fps H265/H264 video encoding | |
| 8M ISP with HDR | |
| DDR | LPDDR4/LPDDR4X RAM is available in optional capacities of 1GB, 2GB, 4GB, or 8GB. |
| eMMC | eMMC 5.1 flash storage is available in optional capacities of 8GB, 16GB, 32GB, 64GB, or 128GB. |
| OS | Android / Ubuntu / Buildroot / Debian |
| Hardware Specifications | |
| Camera Interface | Compatible with the MIPI Alliance Interface specification v1.2 |
| Up to 4 data lanes, 2.5Gbps maximum data rate per lane | |
| One interface with 1 clock lane and 4 data lanes | |
| Two interface, each with 1 clock lane and 2 data lanes | |
| Support up to 16bit DVP interface (digital parallel input) | |
| Support ISP block(Image Signal Processor) | |
| Display Interface | RGB/ BT656/BT1120/ MIPI_DSI_V1.2/ LVDS/ HDMI2.0/Edp1.3/ EBC |
| Support three simultaneous displays | |
| HDR10/HDR HLG/ HDR2SDR/SDR2HDR | |
| 3D-LUT/P2I/CSC/BCSH/DITHER/CABC/GAMMA/COLORBAR | |
| USB Interface | 1 x USB3.0 HOST, 1 x USB3.0 OTG, 2 x USB2.0 HOST |
| PCIe3.0 PHY Interface | Support PCIe3.1(8Gbps) protocol and backward compatible with the PCIe2.1 and PCIe1.1 protocol |
| Support two lane | |
| Support two PCIe controller with x1 mode or one PCIe controller with x2 mode | |
| Dual operation mode: Root Complex(RC)and End Point(EP) | |
| Multi-PHY Interface | Support three multi-PHYs with PCIe2.1/SATA3.0/USB3.0/QSGMII controller |
| USB3 Host controller + USB3 OTG controller | |
| PCIe2.1 controller / three SATA controller | |
| Audio Interface | I2S0 with 8 channel TX and RX |
| I2S1 with 8 channel TX and RX | |
| I2S2/I2S3 with 2 channel TX and RX | |
| PDM with 8channel | |
| TDM supports up to 8 channels for TX and 8 channels RX path | |
| Connectivity | Compatible with SDIO 3.0 protocol |
| GMAC 10/100/1000M Ethernet Controller | |
| Four on-chip SPI controllers | |
| Ten on-chip UART controllers inside | |
| Six on-chip I2C controllers | |
| Smart Card with ISO-7816 | |
| Sixteen on-chip PWMs(PWM0~PWM15) with interrupt-based operation | |
| Multiple groups of GPIO | |
| 8 single-ended input channels SARADC with 10bits resolution up to 1MS/s sampling rate | |
| Other Specifications | |
| Operating temperature | Enterprise level: -20°C to 70°C |
| Industrial level: -40°C to 85°C | |
| PCB interface | B2B，320Pin |
| PCB layers | 10 layers |
| PCB size | L* W *H(mm)：60 *40 * 7.8 |
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